Signal Quality Analyzer-R MP1900A 8-Slot Modular BERT for NRZ/PAM4 Signal Integrity Testing
8-slot modular BERT mainframe for NRZ, PAM4 and PCIe/USB physical-layer testing at up to 64.2 Gbaud and 512 Gbit/s total capacity.
- Input Device
- Resistance film touch panel, Rotary encoder, Function button, Power button
- LCD
- 12.1 inch WXGA (1280 × 800)
- Ethernet
- 10/100/1000 Base-T RJ45 1 port (External: For remote control)
- External Display
- D-Sub 15 pin 1 port
Overview
The Anritsu Signal Quality Analyzer-R MP1900A is an 8-slot modular bit error rate tester (BERT) for physical-layer measurements of high-speed network interfaces using NRZ and PAM4 signaling, as well as bus interfaces such as PCI Express, USB and Thunderbolt. Plug-in modules for pulse pattern generation (PPG), error detection (ED), clock synthesis, jitter modulation and noise generation are combined in one mainframe to build a test configuration without external instruments.
The platform supports 32 Gbit/s multi-channel PPG/ED, 64 Gbaud PAM4 PPG/ED and jitter/noise injection functions that can be expanded to suit specific measurement applications. With the slots filled, total transmission capacity reaches 512 Gbit/s, and a single mainframe can be expanded to 16 channels using 32 Gbit/s 2-channel PPG modules.
PCI Express
Combining the PAM4 PPG MU196020C and PAM4 ED MU196040B with the Re-Driver MU196060A simplifies the PCIe 5 (NRZ) compliance test worst-case configuration and supports Rx LEQ evaluation for the return path using the equalizer. The solution also provides Link Training for PCIe 6 and an Rx evaluation solution for PCIe 7, which uses PAM4 modulation and raises the transfer rate from 64 GT/s to 128 GT/s.
Module compatibility
Modules for the MP1800A series can be used in the MP1900A. The MP1900A series Selection Guide describes supported multichannel configurations and module combinations.
Key Features
- 8-slot modular mainframe
- 512 Gbit/s max. transmission capacity
- PAM4 PPG/ED (MU196020C/MU196040B)
- Baud rate of 2.4 to 64.2 Gbaud
- Multichannel scalability 4ch PAM4/NRZ
- High-speed Tr/Tf of 6.0 ps (20 to 80%, typ.) at 32, 64 Gbaud when using J1789A
- Low intrinsic jitter output of random jitter ≤108 fs rms
- 4Tap Emphasis (20-dB range)
- ISI adjustment function
- FEC pattern generation
- Built-in Clock Recovery
- PAM4 pattern editor and symbol error measurement
- Jitter addition and Jitter Tolerance measurement functions (SJ/RJ/BUJ/SSC)
- Voltage noise addition function (Common/Differential/White Noise)
- Jitter Tolerance measurement using DUT BER counter function
- One main frame expandable to 16ch (filling 8 slots with 32 Gbit/s 2 ch PPG)
- Wideband 32 Gbit/s SI PPG/ED (MU195020A/MU195040A) with 10Tap Emphasis, variable ISI and multi-band CTLE
- High-sensitivity data input of 15 mV typ. (Eye Height) on SI ED
- PCI Express Link Training and LTSSM analysis (MX183000A-PL021)
- USB Link Training and LTSSM analysis (MX183000A-PL022)
- Modules for the MP1800A series can be used in the MP1900A
Specifications
| Input Device | Resistance film touch panel, Rotary encoder, Function button, Power button |
|---|---|
| LCD | 12.1 inch WXGA (1280 × 800) |
| Ethernet |
10/100/1000 Base-T RJ45 1 port (External: For remote control)
A second internal port is reserved for future use
|
| External Display | D-Sub 15 pin 1 port |
| HDMI | HDMI Type A 1 port |
| USB |
Front panel USB Type A 4 port; Rear panel USB Type A 2 port
Plus rear panel 1 port for remote control
|
| Module Slot | 8 Slots |
| OS | Windows 10 |
| Internal Storage Device |
SATA 2.5-inch HDD 1 Unit (tray loading)
Removing and replacing the HDD by Customer is outside the scope of warranty coverage
|
| Remote Interface | GPIB, Ethernet External (automatic switchover) |
| Internal Reference Clock |
10 MHz ± 1 ppm
Accuracy at initial shipment
|
| Power Supply |
100 V(ac) to 120 V(ac), 200 V(ac) to 240 V(ac) (automatic switching between 100 and 200 V systems), 50 Hz to 60 Hz
Operating voltage is –10% to +10% of rated voltage
|
|---|---|
| Power Consumption |
1350 VA
Product page states 1350 VA max.
|
| Operating Temperature Range | +5°C to +40°C |
| Dimensions |
340 (W) × 222.5 (H) × 451 (D) mm
Protrusions excluded
|
| Mass |
20 kg
Excluding modules, blank panels, protective cover, power cord
|
| CE EMC | 2014/30/EU, EN61326-1, EN61000-3-2 |
| CE LVD | 2014/35/EU, EN61010-1 |
| CE RoHS | 2011/65/EU, (EU) 2015/863, EN IEC 63000: 2018 |
|
Operation Rate
MU196020C
|
When selecting the Expert BERT application: 2.4 Gbaud to 32.1/58.2/64.2 Gbaud; When selecting the BERT for PCIe 1-7 application: 2.4 Gbaud to 64.2 Gbaud
Upper limit depends on installed baud rate option
|
|---|---|
|
Number of Output
MU196020C
|
1 |
|
Output Amplitude
MU196020C
|
NRZ: 70 mVp-p to 800 mVp-p, 2 mV step; PAM4: 70 mVp-p to 800 mVp-p, 1 mV step; PAM3: 48 mVp-p to 532 mVp-p, 1 mV step
Single-ended
|
|
Coding
MU196020C
|
NRZ, PAM4, PAM3 |
|
Offset
MU196020C
|
–2.0-Eye Amplitude/2 to +3.3-Eye Amplitude/2 Vth, 1 mV step
Single-ended; offset reference Vth
|
|
Emphasis
MU196020C
|
4 Tap |
|
Independently Variable PAM4 3 Eye
MU196020C
|
Available, 20% to 50%, 1 mV step (in terms of eye amplitude)
PAM4 amplitude: 0/3 level defined as 100%
|
|
Error Addition
MU196020C
|
Bit, Error on MSB, Error on LSB, Error on LSB&MSB, RS-FEC Symbol Error, PCIe6 FEC Symbol Error |
|
Tr/Tf (20 to 80%)
MU196020C
|
Typ. 6.0 ps at 32, 64 Gbaud, when using J1789A; Typ. 7.0 ps at 32, 64 Gbaud, when using J1790A
100 GHz bandwidth sampling oscilloscope used
|
|
Low Residual Jitter (Intrinsic RJ)
MU196020C
|
≤ 108 fs rms
RJ (rms) of jitter analysis function using a 01 repetition pattern; specified at 64 Gbit/s
|
|
Signal to noise and distortion ratio (SNDR)
MU196020C
|
PCIe7 (PAM4): typ. 35 dB
Calibrated at 0.8 Vp-p differential, J1793A Pick OFF Tee, PRBS13Q, oscilloscope residual noise removed
|
|
Output Connector
MU196020C
|
V Connector (J) |
|
Operation Rates (PAM/NRZ)
MU196040B
|
2.4 to either 32.1 Gbaud, or 58.2 (PAM4)/64.2 (NRZ) Gbaud (option selection) |
|---|---|
|
No. of Channels
MU196040B
|
1 |
|
Input Amplitude
MU196040B
|
NRZ: ≤32.1G: 0.05 to 1.0 Vp-p; >32.1G: 0.1 to 1.0 Vp-p; PAM4: ≤32.1G: 0.3 to 1.0 Vp-p; >32.1G: 0.4 to 1.0 Vp-p |
|
Input Sensitivity (Eye Height)
MU196040B
|
NRZ: 19 mV @ 26.5625 Gbaud; 21 mV @ 53.125 Gbaud; PAM4: 23 mV @ 26.5625 Gbaud; 36 mV @ 53.125 Gbaud |
|
Clock Recovery (Option)
MU196040B
|
2.4 to 32.1 Gbaud; 51 to 58.2 Gbaud |
|
Equalizer (Option)
MU196040B
|
Low-frequency Equalizer (≤1 GHz, 2 dB typ.) + DFE (1.4 dB typ.) |
|
PAM4 Counter
MU196040B
|
MSB, LSB, Symbol 0 to 3 (Option) |
|
Input Connector
MU196040B
|
V (f) |
|
Operation Bit Rate (NRZ)
MU195020A
|
2.4 Gbit/s to 21 Gbit/s or 32.1 Gbit/s
32.1 Gbit/s with Option x01
|
|---|---|
|
No. of Channels
MU195020A
|
1 or 2 |
|
Output Amplitude
MU195020A
|
0.1 Vp-p to 1.3 Vp-p (Single-end); 0.2 Vp-p to 2.6 Vp-p (Differential) |
|
Emphasis
MU195020A
|
10Tap
6 post-cursor, 3 pre-cursor; –20 to +20 dB, 0.1 dB step (datasheet)
|
|
ISI Insertion Loss setting
MU195020A
|
1.5 to 25 dB, 0.01 dB step, Nyquist frequency; 0 to 25 dB, 0.01 dB step, 1/2 Nyquist frequency |
|
Tr/Tf (20% – 80%)
MU195020A
|
12 ps (typ.)
Datasheet: 12 ps (typ.), ≤15 ps
|
|
Random Jitter
MU195020A
|
115 fs rms (typ.)
28 Gbit/s 1,0 repeat pattern
|
|
PCIe and USB Link Training
MU195020A
|
Supported (MX183000A-PL021/PL022/PL025) |
|
Output Connector
MU195020A
|
K (f) |
|
Operation Bit Rate (NRZ)
MU195040A
|
2.4 Gbit/s to 21 Gbit/s or 32.1 Gbit/s
32.1 Gbit/s with Option x01
|
|---|---|
|
No. of Channels
MU195040A
|
1 or 2 |
|
Input Amplitude
MU195040A
|
0.05 Vp-p to 1.0 Vp-p (Single-End); 0.1 Vp-p to 2.0 Vp-p (Differential) |
|
Input Sensitivity (Eye Height)
MU195040A
|
15 mV (Eye Height 28.1 Gbit/s); 30 mV/Eye (28.1 Gbaud, PRBS15, PAM4) |
|
CTLE
MU195040A
|
Peak Frequency 14, 8, 4 GHz; Gain 0 to –12 dB |
|
Clock Recovery
MU195040A
|
Yes, SSC support |
|
Input Connector
MU195040A
|
K (f) |
|
Number of Channels
MU196050B
|
1
Always use in combination with the Pick OFF Tee J1793A standard accessory
|
|---|---|
|
Frequency (DMI)
MU196050B
|
Sinusoidal wave: 2 GHz to 10 GHz |
|
Amplitude (DMI)
MU196050B
|
0 to 200 mVp-p (Differential)
Measured at end of J1948A/J1793A/34VKF50A/J1821A connection
|
|
Frequency (CMI)
MU196050B
|
Sinusoidal wave Low Band: 100 MHz to 1 GHz; High Band: 1 GHz to 6 GHz |
|
Amplitude (CMI)
MU196050B
|
0 to 250 mVp-p (Single-ended) |
|
Output Control
MU196050B
|
Switchable ON/OFF (DMI/CMI and External Input are mutually exclusive and selectable.) (DMI/CMI can be output simultaneously.) |
|
Dimensions and Mass
MU195020A, MU195040A
|
234 (W) × 21 (H) × 175 (D) mm (Excluding protrusions), 2.5 kg max. |
|---|---|
|
Operating Temperature
MU195020A, MU195040A
|
15°C to 35°C |
Specifications are taken from the manufacturer's documentation. See the datasheet for complete and current values.
Applications
- 100 GbE/200 GbE/400 GbE/800 GbE
- CEI-25G/28G/56G/112G
- InfiniBand EDR/HDR
- Fibre Channel
- PCIe 1-7
- CXL2/3
- Thunderbolt 1/2/3/4
- USB3.2/4 v1/4 v2
- SAS-3/-4
- DP1.4/2.0/2.1
- DDR5
- Optical modules
- SERDES
- Active optical cables (AOC)
- High-speed interconnects
- Signal integrity analysis
Included
- Pick OFF Tee J1793A (standard accessory of Noise Generator MU196050B)
- Coaxial Adapter J1359A (K-P.K-J to SMA) (standard accessory of SI PPG MU195020A)
Options & Accessories
| Option | Description |
|---|---|
| MP1900A-110 | Windows10 Upgrade Retrofit — For MP1900A with Windows Embedded Standard 7 orders received before June 2020; performed by modifying hardware |
| MP1900A-ES310 | Three Years Extended Warranty Service |
| MP1900A-ES510 | Five Years Extended Warranty Service |
| MU195020A | 21G/32G bit/s SI PPG |
| MU195020A-001 | 32 Gbit/s Extension |
| MU195020A-010 | 1ch Data Output |
| MU195020A-020 | 2ch Data Output |
| MU195020A-011 | 1ch 10Tap Emphasis |
| MU195020A-021 | 2ch 10Tap Emphasis |
| MU195020A-030 | 1ch Data Delay |
| MU195020A-031 | 2ch Data Delay |
| MU195020A-040 | 1ch Variable ISI |
| MU195020A-041 | 2ch Variable ISI |
| MU195020A-050 | Sequence Editor Function |
| MU195020A-051 | Sequence Editor Function PCIe 5 Extension |
| MU195040A | 21G/32G bit/s SI ED |
| MU195040A-001 | 32 Gbit/s Extension |
| MU195040A-010 | 1ch ED |
| MU195040A-020 | 2ch ED |
| MU195040A-011 | 1ch CTLE |
| MU195040A-021 | 2ch CTLE |
| MU195040A-022 | Clock Recovery |
| MU196020A | PAM4 PPG |
| MU196020A-060 | PCIe6 LEQ |
| MU196020C | PAM4 PPG |
| MU196020C-001 | 32G baud |
| MU196020C-002 | 58G baud |
| MU196020C-003 | 64G baud |
| MU196020C-011 | 4Tap Emphasis |
| MU196020C-030 | Data Delay |
| MU196020C-040 | Adjustable ISI |
| MU196020C-042 | FEC Pattern Generation |
| MU196020C-043 | FEC Error Insertion for PCIe6 |
| MU196020C-045 | USB4 Gen4 Pattern Generation |
| MU196020C-050 | Inter-Module Synchronization |
| MU196040B | PAM4 ED |
| MU196040B-001 | 32G baud (2.4G to 32.1G) |
| MU196040B-002 | 58G baud (NRZ: 2.4G to 64.2G, PAM4: 2.4G to 58.2G) |
| MU196040B-005 | 64G baud — There are software restrictions when using 64G baud |
| MU196040B-011 | Equalizer |
| MU196040B-021 | 29G baud Clock Recovery (2.4G to 29G) |
| MU196040B-022 | 32G baud Clock Recovery (2.4G to 32.1G) |
| MU196040B-023 | 58G baud Clock Recovery Extension (51G to 58.2G) |
| MU196040B-041 | SER Measurement |
| MU196040B-042 | FEC Analysis |
| MU196040B-043 | FEC Analysis for PCIe6 |
| MU196040B-051 | PCIe Sequence Editor Pattern Analysis |
| MU196040A | PAM4 ED |
| MU196050B | Noise Generator |
| MU195050A | Noise Generator |
| MU195050A-001 | White Noise |
| MU196060A | 32G baud NRZ/PAM4 Re-Driver |
| MU196060A-001 | Clock Recovery for SSC |
| MU191000A | Synthesizer |
| MU181000B | 12.5 GHz 4port Synthesizer |
| MU181000B-002 | SSC Extension |
| MU181500B | Jitter Modulation Source |
| MX183000A | High-Speed Serial Data Test Software |
| MX183000A-PL001 | Jitter Tolerance Test |
| MX183000A-PL011 | PCIe Link Sequence |
| MX183000A-PL021 | PCIe Link Training |
| MX183000A-PL022 | USB Link Training |
| MX183000A-PL023 | USB 3.2 × 2 Link Training |
| MX183000A-PL025 | PCIe 5 Link Training |
| MX183000A-PL026 | PCIe 6 Link Training |
| MX183000A-PL031 | DUT Error Counts Import |